Job Description
Senior Design Verification Engineer – Hyderabad
Location: Hyderabad, India
Experience: 6+ years
Domain Expertise: PCIe Gen5/6
About the Role
We are seeking a Senior Design Verification Engineer to join our high-performance So C/CPU team in Hyderabad. This role is ideal for engineers with deep expertise in PCIe Gen5/6 verification and a passion for building robust, scalable verification environments for next-generation semiconductor designs.
Key Responsibilities
Lead verification planning, environment development, and test execution for PCIe Gen5/6 protocols.
Develop and maintain UVM-based testbenches for complex So C subsystems.
Drive coverage-driven verification and ensure closure of functional, code, and assertion coverage.
Collaborate with architects, RTL designers, and validation teams to define verification strategies.
Debug complex issues across simulation, emulation, and silicon bring-up phases.
Mentor junior engineers and contribute to best p...
Location: Hyderabad, India
Experience: 6+ years
Domain Expertise: PCIe Gen5/6
About the Role
We are seeking a Senior Design Verification Engineer to join our high-performance So C/CPU team in Hyderabad. This role is ideal for engineers with deep expertise in PCIe Gen5/6 verification and a passion for building robust, scalable verification environments for next-generation semiconductor designs.
Key Responsibilities
Lead verification planning, environment development, and test execution for PCIe Gen5/6 protocols.
Develop and maintain UVM-based testbenches for complex So C subsystems.
Drive coverage-driven verification and ensure closure of functional, code, and assertion coverage.
Collaborate with architects, RTL designers, and validation teams to define verification strategies.
Debug complex issues across simulation, emulation, and silicon bring-up phases.
Mentor junior engineers and contribute to best p...
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