Job Description

Senior Design Verification Engineer – Hyderabad


Location: Hyderabad, India

Experience: 6+ years

Domain Expertise: PCIe Gen5/6


About the Role


We are seeking a Senior Design Verification Engineer to join our high-performance SoC/CPU team in Hyderabad. This role is ideal for engineers with deep expertise in PCIe Gen5/6 verification and a passion for building robust, scalable verification environments for next-generation semiconductor designs.


Key Responsibilities


Lead verification planning, environment development, and test execution for PCIe Gen5/6 protocols.

Develop and maintain UVM-based testbenches for complex SoC subsystems.

Drive coverage-driven verification and ensure closure of functional, code, and assertion coverage.

Collaborate with architects, RTL designers, and validation teams to define ver...

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