Job Description

Job Description: Senior Design Verification Engineer

Experience: 5+ Years

Location: United Kingdom/India

Domain: SoC / IP Verification

Role Overview

We are seeking an experienced Design Verification Engineer with strong expertise in PCIe, Network-on-Chip (NoC), and AMBA 5+ protocols to join our growing engineering team in the UK. The ideal candidate will be responsible for developing and executing verification strategies for complex IPs and SoCs, ensuring high-quality silicon delivery.

Key Responsibilities

  • Develop and execute verification plans for complex IPs/SoCs based on specifications and architecture documents
  • Build and maintain SystemVerilog/UVM-based verification environments
  • Verify high-speed and complex protocols including PCIe (Gen3/Gen4/Gen5), AMBA 5+ (AXI, ACE, CHI), and NoC fabrics
  • Create and execute directed and constrained-random test cases
  • Develop functional coverage models and ensure coverage closure
  • Debug failures, analyze waveforms, and collaborate closely with design, architecture, and firmware teams
  • Integrate and use VIPs for PCIe, AMBA, and NoC verification
  • Participate in regression analysis , gate-level simulations, and bug tracking
  • Contribute to verification methodology improvements and best practices

Required Skills & Qualifications

  • 5+ years of hands-on experience in Design Verification
  • Strong expertise in SystemVerilog and UVM
  • In-depth knowledge of PCIe protocol (transaction layer, data link layer, LTSSM, compliance aspects)
  • Strong experience with AMBA 5+ protocols (AXI, ACE, ACE-Lite, CHI)
  • Good understanding of Network-on-Chip (NoC) architectures and verification challenges
  • Experience with functional coverage, assertions (SVA), and scoreboards
  • Proficiency in simulation tools such as VCS, Questa, or Xcelium
  • Strong debugging and problem-solving skills

Good to Have

  • Experience with SoC-level verification and subsystem integration
  • Exposure to low-power verification (UPF/CPF)
  • Knowledge of C/C++ or Python for testbench development or automation
  • Experience with formal verification or emulation platforms
  • Familiarity with CI/CD flows for verification regressions

Education

  • Bachelor’s or Master’s degree in Electronics / Electrical Engineering / Computer Engineering or a related field

Soft Skills

  • Strong communication and documentation skills
  • Ability to work independently and in a collaborative, multicultural environment
  • Proactive attitude with strong ownership and accountability

Interested candidates can share their updated resumes at ( ) .

Referrals are welcome!

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