Senior DFT Engineer

Hi All,

Greetings from Eximietas...!

Position: Senior DFT Engineers/Leads/Architects

Location: Visakhapatnam

Mode of Work: On-site

Exp: 5 to 15 Years

We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test (DFT). An intimate knowledge and experience in scan chain insertion, compression scan technologies, memory built-in self-test (MBIST) and automatic test pattern generation (ATPG) is required for this position. Should follow systematic quality metrics driven ATPG pattern generation. It is highly desirable for candidate to possess hands-on knowledge of synthesis, verification and debugging Verilog testbenches.

Job Overview:

• Must be able to obtain and maintain a Department of Defense classified clearance
• Prior 5-15 years of professional experience i...