Job Description
Job Responsibilities
- Implementing and optimizing boundary scan, MBIST, test logic insertion, and JTAG solutions.
- Developing and validating scan ATPG and compression methodologies.
- Conducting DFT and post-gate simulation processes to ensure design robustness.
- Generating and applying DFT constraints for efficient testing.
- Delivering effective test patterns and collaborating with the test team for ATE debugging.
- Utilizing EDA tools like Tessent to enhance test processes and efficiency.
Job Requirements
- Possesses a Masters or Bachelors degree in Electrical Engineering or Computer Engineering
- At least 4 years of relevant experience
- Proficiency in synthesis tools such as Genus or Design Compiler.
- Experience working closely with designers to create test plans and strategies.
- Proven ability to collaborate with implementation teams for DFT insertion and...
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