Job Description

Senior DFT Engineer – Barcelona - Innovative RISC-V Developments
This is a fantastic opportunity for a Senior DFT Engineer to work on complex projects and RISC-V IP. This is a brand new role within a new ASIC Development team, meaning that you will be involved in defining DFT methodologies and architecture.
The key skills needed for the Senior DFT Engineer are:
  • A strong track record in DFT gained across several successful ASIC projects.
  • DFT experience including architecture specification, implementation, test pattern development and verification.
  • Experience working on microprocessors is a plus
  • Experience with MBIST insertion, simulation, and verification.
  • Scan ATPG pattern generation, simulation and debug.
  • Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, and MBIST.
  • For more information on this role, please contact Lucy Edmondson.

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