Job Description

A global semiconductor leader based in Valencia is looking for a Staff Digital Design Verification Engineer. The candidate will define test plans, develop UVM testbenches, and run complex design verifications. Applicants should have 5-10 years in ASIC design verification, a degree in Electronic Engineering, and strong debugging skills. Familiarity with Python and Digital Signal Processing tools such as MATLAB is preferred. This role offers an opportunity to advance your technical expertise in a dynamic environment.
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