Job Description
Description:
Based in our Manila office you will work closely with colleagues locally and in the other IC Design Centres to verify all the digital functions of the mixed signal products developed by Power Integrations. This will include:
+ Creating the digital verification plan based on the design specifications.
+ Implementing scalable testbenches, including checkers, reference models and coverage groups in SystemVerilog.
+ Implementing sufficient self-testing, directed and random tests to complete the test plan and coverage goals.
+ Developing suitable behavioural models to help accelerate mixed-signal simulation.
Education & Experience:
+ MSc/MEng or PhD in Electronics Engineering or related subject.
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