Job Description
Role : STA Engineer
Location : Bangalore
Exp: 5+Years
Preferred : Immediate to 30days notice
Responsibilities:
Perform block-level and full-chip Static Timing Analysis (STA)
Develop and maintain SDC timing constraints (clocks, IOs, false paths, multicycle paths)
Collaborate with PD, CTS, and Design teams for timing closure
Handle ECO timing fixes and timing signoff
Perform low power timing checks using UPF/CPF
Requirements:
Hands-on experience with Prime Time / Tempus
Strong expertise in SDC constraints & timing concepts
Experience with multi-clock designs
Knowledge of OCV/AOCV/POCV
Understanding of digital & physical design flow
Interested can apply here / share cvs directly to
Location : Bangalore
Exp: 5+Years
Preferred : Immediate to 30days notice
Responsibilities:
Perform block-level and full-chip Static Timing Analysis (STA)
Develop and maintain SDC timing constraints (clocks, IOs, false paths, multicycle paths)
Collaborate with PD, CTS, and Design teams for timing closure
Handle ECO timing fixes and timing signoff
Perform low power timing checks using UPF/CPF
Requirements:
Hands-on experience with Prime Time / Tempus
Strong expertise in SDC constraints & timing concepts
Experience with multi-clock designs
Knowledge of OCV/AOCV/POCV
Understanding of digital & physical design flow
Interested can apply here / share cvs directly to
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