Job Description
Hiring | RTL Design Engineer
ACL Digital is looking for RTL Design Engineers with strong micro-architecture experience to join our growing VLSI teams.
Experience: 4+ years
Strong hands-on in RTL Design (Verilog/System Verilog)
Solid micro-architecture understanding
Experience in Lint & CDC (Spy Glass / Questa / VC CDC or similar)
Notice Period: Immediate to 30 days / Serving notice period
Interested candidates, share your resume at:
#RTLDesign #Micro Architecture #RTLJobs #Lint #CDC
#VLSI #ASIC #So C #Semiconductor Jobs
#Hiring Now #Immediate Joiners #ACLdigital
ACL Digital is looking for RTL Design Engineers with strong micro-architecture experience to join our growing VLSI teams.
Experience: 4+ years
Strong hands-on in RTL Design (Verilog/System Verilog)
Solid micro-architecture understanding
Experience in Lint & CDC (Spy Glass / Questa / VC CDC or similar)
Notice Period: Immediate to 30 days / Serving notice period
Interested candidates, share your resume at:
#RTLDesign #Micro Architecture #RTLJobs #Lint #CDC
#VLSI #ASIC #So C #Semiconductor Jobs
#Hiring Now #Immediate Joiners #ACLdigital
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