Job Description
Hiring | RTL Design Engineer
ACL Digital is looking for RTL Design Engineers with strong micro-architecture experience to join our growing VLSI teams.
🔹 Experience: 4+ years
🔹 Strong hands-on in RTL Design (Verilog/SystemVerilog)
🔹 Solid micro-architecture understanding
🔹 Experience in Lint & CDC (SpyGlass / Questa / VC CDC or similar)
🔹 Notice Period: Immediate to 30 days / Serving notice period
📩 Interested candidates, share your resume at:
👉 [email protected]
#RTLDesign #MicroArchitecture #RTLJobs #Lint #CDC
#VLSI #ASIC #SoC #SemiconductorJobs
#HiringNow #ImmediateJoiners #ACLdigital
ACL Digital is looking for RTL Design Engineers with strong micro-architecture experience to join our growing VLSI teams.
🔹 Experience: 4+ years
🔹 Strong hands-on in RTL Design (Verilog/SystemVerilog)
🔹 Solid micro-architecture understanding
🔹 Experience in Lint & CDC (SpyGlass / Questa / VC CDC or similar)
🔹 Notice Period: Immediate to 30 days / Serving notice period
📩 Interested candidates, share your resume at:
👉 [email protected]
#RTLDesign #MicroArchitecture #RTLJobs #Lint #CDC
#VLSI #ASIC #SoC #SemiconductorJobs
#HiringNow #ImmediateJoiners #ACLdigital
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