Job Description

Job DescriptionThe Senior Manufacturing and Test Engineer is responsible for improving manufacturing and test flows to optimize quality, yield and power in AI ASICs. Activities include DFT definition, coverage analysis and test content improvements at socket & system level to drive yield and quality. Collaboration across design and manufacturing teams to correlate pre-silicon to post-silicon through data analysis, building quality models and driving optimizations is expected. Deep understanding and experience in DFT architecture, quality, yield and power measurement flows is needed.
**Please provide an English resume for reference. Thank you!Requirement•BS or MS in Electrical Engineering or related field.
• 8+ years of experience with ASIC/CPU/GPU design, test and post-silicon
• DFT architecture & implementation knowledge
• Understand silicon design test and manufacturing flows
• Quality and reliability knowledge
• Data analysis and model building experience

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