Senior Pre‑Silicon Verification Architect — SoC/IP

A leading semiconductor company in Jalisco seeks a Pre-Silicon Design Verification Engineer. The role involves defining verification strategies and developing UVM-based testbenches for complex SoC designs. Ideal candidates will have 8+ years of experience in verification, strong skills in SystemVerilog, and knowledge of relevant protocols. Join a high-performing digital team committed to innovation and delivering world-class silicon solutions.
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