Job Description
**Job Details:**
**Job Description:**
**About Intel Central Engineering Group**
Intel's Central Engineering Group (CEG) is committed to transforming engineering processes while expanding market reach through internal product development and external ASIC design services. Three interconnected pillars drive CEG's mission to enhance Intel's engineering execution and market opportunities, all guided by a data-driven approach that ensures scalable impact.
**Position Overview**
We are seeking a Senior Mixed Signal Verification Engineer specializing in clock generator IP verification to ensure functional correctness of PLL/FLL designs. This role combines digital verification expertise with mixed-signal validation capabilities, requiring collaboration across architecture, RTL development, and analog design teams to deliver high-quality clock generation solutions.
**Key Responsibilities**
**Clock Generator IP Verification**
**Job Description:**
**About Intel Central Engineering Group**
Intel's Central Engineering Group (CEG) is committed to transforming engineering processes while expanding market reach through internal product development and external ASIC design services. Three interconnected pillars drive CEG's mission to enhance Intel's engineering execution and market opportunities, all guided by a data-driven approach that ensures scalable impact.
**Position Overview**
We are seeking a Senior Mixed Signal Verification Engineer specializing in clock generator IP verification to ensure functional correctness of PLL/FLL designs. This role combines digital verification expertise with mixed-signal validation capabilities, requiring collaboration across architecture, RTL development, and analog design teams to deliver high-quality clock generation solutions.
**Key Responsibilities**
**Clock Generator IP Verification**
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