Senior Silicon Design Verification Engineer

A leading semiconductor company is seeking a Staff Silicon Design Verification Engineer in Penang, Malaysia. This role involves planning, building, and executing verification for High Speed IO Protocol IPs. Candidates should have over 7 years of experience in digital IP verification, proficiency in UVM, Verilog, SystemVerilog, and experience with scripting languages. Responsibilities include guiding DV tasks, building test plans, and collaborating with teams to debug and resolve design defects. The position offers a competitive benefits package.
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