Job Description

Job Details

Job Description:

Altera, a leader in programmable solutions from cloud to edge, delivers cutting-edge FPGA, CPLD, and IP technologies. We are driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure. Our mission is to empower engineers to design and deploy advanced systems with unmatched flexibility and performance.

We are seeking a talented Senior Staff Logic Design Engineer to develop and optimize mixed-signal and high-speed IPs for integration into full-chip designs.

Key Responsibilities

  • Participate in design development tasks throughout the IP development flow.
  • Develops the logic design, register transfer level (RTL) coding, and simulation for an IP.
  • Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional ...

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