Senior UVM Verification Architect – Memory IP

A leading semiconductor company in Ontario, Canada, is seeking a skilled Verification Engineer to drive innovation in memory interface IP. The ideal candidate will have a strong background in SystemVerilog and UVM and be adept at developing verification test plans and mentoring junior engineers. This role offers opportunities for collaboration in a dynamic, multicultural team focused on high-performance silicon chip design. Expect a comprehensive benefits package supporting health and wellness alongside your professional growth.
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