Senior Verification Architect: Lead ASIC & UVM Testbenches

A leading semiconductor technology firm in Ottawa is seeking an experienced verification architect. The ideal candidate should have over 12 years of experience in digital design verification, expertise in System Verilog and UVM, and proficiency in C/C++ scripting. You will lead and mentor engineers, collaborate with global teams, and implement advanced verification methodologies. This role is pivotal in ensuring the success of complex ASIC and IP designs, driving process improvements and innovation in verification practices.
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