Job Description

Leadsoc is hiring!

Experience: 8 years to 13 years

Notice Period: Immediate to 15 days


Job Description:

  • The ideal candidate will be taking part ownership of existing UVM based testbench for project and make required enhancements to the testbench as required.
  • Develop testcases using the testbench. Create functional coverage items. Run code and functional coverage, analyse data and work with designer
  • To achieve desired coverage. Make required updated to testbench for netlist simulation, run identified tests on netlist and work with team for required debug.
  • Make required updates to testbench for netlist and gate-level simulation, run identified tests on netlist and gate-level netlist, and work with team for required debug.

Technical Skills:

  • Well versed in full Verification cycle of including test development, debug and coverage closure through industry standard simulation tools.
  • Well versed with Cadence simulation tools (Xcelium and Simvision) and netlist simulation.
  • Familiarity with Datapath blocks is desirable.
  • Knowledge of scripting – python/shell.
  • Should be able to execute the tasks independently.


Please share your profile to [email protected] for further discussion

Apply for this Position

Ready to join ? Click the button below to submit your application.

Submit Application