Job Description
**Required Skills**:
- SOC Bandwidth, QoS, Latency and Throughput analysis
- Interconnect architectures - NoCs, AXI, AHB etc. Knowledge of upstream and downstream operations and the ability to write programs to stress their transactions for appropriate coverage
- Solid expertise in various FIFO designs and related performance/functionality aspects
- Come up with thorough performance validation plans and work closely with team members to ensure Performance-Power trade-offs are factored in
- Low power modes
- Dynamic clock and voltage scaling operations
- Interrupt architecture
- Debug architecture - interactions with JTAG based debuggers, state dump scripts
- Performance monitor architecture
- Thorough understanding of CPU and DDR concepts, Multimedia, GPU, Peripheral,
- Memory hierarchy and caches - coherency, consistency (ordering), memory types and attributes, synchronization & semaphores, full-system concurrency, MTE, MPAM
- Experience in embedded...
- SOC Bandwidth, QoS, Latency and Throughput analysis
- Interconnect architectures - NoCs, AXI, AHB etc. Knowledge of upstream and downstream operations and the ability to write programs to stress their transactions for appropriate coverage
- Solid expertise in various FIFO designs and related performance/functionality aspects
- Come up with thorough performance validation plans and work closely with team members to ensure Performance-Power trade-offs are factored in
- Low power modes
- Dynamic clock and voltage scaling operations
- Interrupt architecture
- Debug architecture - interactions with JTAG based debuggers, state dump scripts
- Performance monitor architecture
- Thorough understanding of CPU and DDR concepts, Multimedia, GPU, Peripheral,
- Memory hierarchy and caches - coherency, consistency (ordering), memory types and attributes, synchronization & semaphores, full-system concurrency, MTE, MPAM
- Experience in embedded...
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