Job Description
SoC RTL Design Engineer, TPU
_corporate_fare_ Google _place_ Sunnyvale, CA, USA
**Mid**
Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development.
+ Experience with digital clock control circuits, including clock dividers, glitch-free muxes, and clock gating.
+ Experience in SystemVerilog for creating microarchitecture specifications and synthesizable RTL.
+ Experience with design quality tools, specifically for Clock Domain Crossing (CDC), linting, and static timing analysis.
+ Experience using Python, Tcl, or Perl for automating design tasks and data analysis.<...
_corporate_fare_ Google _place_ Sunnyvale, CA, USA
**Mid**
Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.
**Minimum qualifications:**
+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 2 years of experience in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development.
+ Experience with digital clock control circuits, including clock dividers, glitch-free muxes, and clock gating.
+ Experience in SystemVerilog for creating microarchitecture specifications and synthesizable RTL.
+ Experience with design quality tools, specifically for Clock Domain Crossing (CDC), linting, and static timing analysis.
+ Experience using Python, Tcl, or Perl for automating design tasks and data analysis.<...
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