Job Description
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 4 years of experience verifying digital logic at the Register Transfer Level (RTL) using SystemVerilog at Subsystem and full-chip level.
- Experience with debugging of full chip flows and test sequences.
- Experience with reusable testbench design and development at Sub System and full chip level.
- Experience in C/C++ or System Verilog based tests, test sequence development.
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in low-power design verification.
- Experience with digital system based on AMBA Bus protocols like ACE/AXI/AHB/APB or similar complexity bus protocols.
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