Job Description
Job Summary:
We’re seeking a highly skilled Lead SoC Verification Engineer with deep expertise in ARM-based SoC architectures , System Verilog/UVM , and reusable verification environments . This role is ideal for someone who thrives on technical leadership, drives verification strategy end-to-end, and embraces automation and innovation — including the use of AI/ML techniques to accelerate verification.
You will lead verification planning, architecture, and execution for complex SoC designs, collaborating closely with design, architecture, and validation teams. If you enjoy building scalable testbenches, optimizing flows, and mentoring engineers, this role offers the perfect platform.
#LI-RG1
Lead verification strategy, planning, and execution for ARM-based SoC IP and subsystems. Architect, develop, and maintain System Verilog/UVM-based testbenches and reusable verification environments . Drive creation of test plans , coverage models, checkers, scoreboards, and verification infrastructure. Implement scalable and modular TB/ENV architectures to support multiple configurations and derivatives. Own verification execution including stimulus development, regressions, debug, and coverage closure. Apply automation techniques/scripting and leverage AI/ML-based approaches to improve verification efficiency, triage, and coverage optimization. Perform Gate-Level Simulation (GLS) , including SDF annotation, timing verification, and debug. Execute power-aware verification using UPF/CPF methodologies. Collaborate with cross-functional teams (design, DV, architecture, validation, firmware) to ensure high-quality SoC delivery. Mentor junior engineers and contribute to best practices, methodology improvements, and tool flow enhancements. #LI-RG1
Required Qualifications
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. 15 years of experience in SoC/IP verification, with at least 3 years in a lead role . Strong expertise in System Verilog , UVM , and advanced verification methodologies. Hands-on experience with ARM-based SoC architectures , AMBA protocols (AXI/AHB/APB), and system-level interactions. Proven ability to build reusable, scalable testbench architectures . Solid understanding of test planning , coverage-driven verification, and verification metrics. Experience with GLS , timing verification, and debug. Knowledge of power-aware verification (UPF/CPF). Strong scripting and automation skills (Python, Perl, Shell, Make, . Exposure to AI/ML techniques applied to verification (., intelligent stimulus generation, failure triage, coverage optimization). Excellent problem-solving, debugging, and communication skills. #LI-RG1
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