Job Description

Description

  • Experienced with ASIC design flow, hierarchical physical design strategies, methodologies, and understand deep sub-micron technology issues.

  • Solid knowledge on Low Power Design, DFT, static timing analysis and closure, data skew balancing, duty cycle adjustment, EM/IR-Drop/crosstalk analysis, formal verification, physical verification, DFM and P&R.

  • Able to assume responsibility for a variety of technical tasks and to work independently

  • Able to be hands-on at all levels of design, with the ability to verify, test, and characterize own designs

  • Self-motivated, able to work as a team player, and good English communication skills

  • The candidate will work closely with RTL design team to ensure successful tapeouts.

    • We’re doing work that matters. Help us solve what others can’t.

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