Job Description


Description



Responsibilities

  • Design and verification of digital IP for CIS
  • Define chip level architecture taking into consideration power, performance & area trade-offs; build top level and module specification
  • Perform logic synthesis, work with backend team for floor planning, STA and DFT
  • Drive innovation and continuous improvement of design flow
  • Mentor junior team members
  • Participate in project planning and progress tracking
  • Full-chip integration and verification
  • Silicon bring-up, validation and debug
  Qualifications
  • Minimum MSEE + at least 4 yrs. of digital design experience
  • Expertise in RTL design and verification for ASICs.
  • Experience handling logic synthesis and static timing analysis for multiple projects
  • Knowledge of all aspects of chip development cycle from design specification, architecture definition, low-power des...

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