Job Description
Sr. Emulation Engineer
Job Description
4-5 yrs of experience in emulation/prototyping using Cadence/Synopsys tool flows (Palladium/Protium/HAPS/Zebu)
Working knowledge of System Verilog & Verilog language semantics and compilation flows
Solid understanding on SOC architecture and A...
Job Description
4-5 yrs of experience in emulation/prototyping using Cadence/Synopsys tool flows (Palladium/Protium/HAPS/Zebu)
Working knowledge of System Verilog & Verilog language semantics and compilation flows
Solid understanding on SOC architecture and A...
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