Job Description

Role Overview

We are expanding our team in India and seeking a Staff Digital Design Engineer to lead the micro-architecture and implementation of advanced digital subsystems for automotive Ethernet communication systems. You will collaborate across analog and digital teams to deliver high-performance, reliable solutions for next-generation automotive networks.

Required Skills

  • BS/MS/B. Tech/M. Tech in Electrical Engineering or related field 
  • 8+ years of experience in digital design for communication systems 
  • Expertise in Verilog/SystemVerilog, Ethernet or similar protocols, and PHY layer design 
  • Strong understanding of PLLs, clocking schemes, and timing closure 
  • Experience with analog IP integration and cross-domain collaboration 
  • Familiarity with automotive standards and reliability requirements

  • Preferred Skills

  • Knowledge of automotive Ethernet (100BASE-T1, 1000BASE-T1) or similar high-speed serial standards 
  • Experience with IP, subsystem-level design and integration 
  • Proficiency in scripting languages (Python, TCL) and simulation tools 
  • Strong documentation and communication skills
  • Why Join Us
    Join us in shaping the future of the connected car—driving innovation in vehicle connectivity, safety, and automation through cutting-edge automotive networking technologies and high-performance communication systems. Collaborate with a global team to redefine mobility and enable the next generation of intelligent vehicles

    #LI-RG1

    Key Responsibilities

  • Design and verify digital blocks for Ethernet MAC, PCS, and Base-T PHY layers 
  • Micro-architect and implement Digital Front-End (DFE) designs for automotive PHYs 
  • Integrate analog IPs and collaborate with analog and communication systems teams 
  • Lead subsystem creation including clocking, reset, and power management strategies 
  • Support system-level integration and validation in automotive environments 
  • Experience with ISO 26262 functional safety standards (plus) 
  • Familiarity with AEC-Q100 qualification requirements (plus) 
  • Expertise in Linting, CDC, and RDC verification 
  • Constraint development using SDC and timing closure techniques 
  • Low-power design using UPF 
  • Performing/driving manual ECOs and tool driven ECOs
  • #LI-RG1

    Required Skills

  • BS/MS/B. Tech/M. Tech in Electrical Engineering or related field 
  • 8+ years of experience in digital design for communication systems
  • #LI-RG1

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