Staff Digital Verification Architect for ASIC/SoC IP

A global semiconductor leader in Valencia is seeking a Staff Digital Design Verification Engineer to contribute to key design verification tasks for next-generation integrated circuits. The ideal candidate will have 5-10 years in ASIC design verification, strong debugging skills, and the ability to work in a diverse environment. Key responsibilities include defining test plans and utilizing advanced verification techniques, aiming to enhance design verification productivity. The role requires strong communication and teamwork skills, so the candidate should be proficient in both writing and speaking English.
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