Job Description

KEY RESPONSIBILITIES

  • Experience and demonstrated technical expertise in the development & execution of platform level electrical & functional test plans, preferably DDR/LPDDR/GDDR Memory test experience.
  • Extensive hands‑on experience and demonstrated technical expertise in the debug of I/O interfaces such as DDR.
  • Identify, debug, and resolve system-level issues, collaborating with cross‑site memory, debug, design, firmware, and software teams.
  • Maintain detailed validation plans and reports

EXPERIENCE

  • 3-5 years of industry experience in system or post‑silicon validation of IO system.
  • Familiar with Windows and Linux environment.
  • Strong understanding of DDR/GDDR memory sub-system and their interaction with hardware and software.
  • Hands‑on experience with debugging tools such as Win‑debug, logic analyzers, and protocol analyzers.
  • Familiar with Python, Ruby, Perl langua...

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