Asic Engineer Physical Design Jobs in Sunnyvale
ethical AI opportunities in United States
Jobs Found
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ASIC/FPGA Engineer IV, Networks
🏢 Lockheed Martin
📍 Sunnyvale, California, United States
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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, California, United States
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Principal ASIC Design Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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Sr. ASIC Design Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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ASIC/SOC DFT Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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Core Engineering - Design Engineer V
🏢 eTeam Inc.
📍 Sunnyvale, California, , United States
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Physical Design Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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Physical Design Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, California, United States
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Cellular SoC Static Timing Analysis Engineer
🏢 Apple
📍 Sunnyvale, CA, United States
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Sr. Full Chip Physical Design Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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ASIC Engineer, Infra Silicon Pre/Post Silicon Validation
🏢 Meta
📍 Sunnyvale, CA, United States
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Cellular SoC Static Timing Analysis Engineer
🏢 Apple
📍 Sunnyvale, CA, United States
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Physical Design Flow and Methodology Engineer
🏢 Google
📍 Sunnyvale, CA, United States
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ASIC Engineer, Networking Architecture and Modeling
🏢 Meta
📍 Sunnyvale, CA, United States
S
Sr. ASIC/SOC Verification Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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Sr. SOC/ASIC DFT Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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ASIC RTL Design Engineer, ML Accelerators
🏢 Google
📍 Sunnyvale, CA, United States
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ASIC RTL Design Engineer, ML Accelerators, University Graduate
🏢 Google
📍 Sunnyvale, CA, United States
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ASIC RTL Design and Automation Engineer, University Graduate
🏢 Google
📍 Sunnyvale, CA, United States
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Senior Physical Design Flow and Methodology Engineer
🏢 Google
📍 Sunnyvale, CA, United States
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Principal Design Verification Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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Sr. Design Verification Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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TPU RTL Design Engineer, Networking and Inter-Chip-Interconnects
🏢 Google
📍 Sunnyvale, CA, United States
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Design Verification Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, CA, United States
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Principal Design Verification Engineer (Silicon Engineering)
🏢 SpaceX
📍 Sunnyvale, California, United States
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FPGA Design Engineer -- Early-Career
🏢 Lockheed Martin
📍 Sunnyvale, CA, United States
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FPGA Design/Verification Engineer
🏢 PGS Worldwide
📍 Sunnyvale, California, , United States
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Senior TPU RTL Design Engineer, Networking, Inter-Chip Interconnects
🏢 Google
📍 Sunnyvale, CA, United States